How are Microchips Made? 🖥️🛠️ CPU Manufacturing Process Steps

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Integrated Circuits, CPUs, GPUs, Systems on a Chip, Microcontroller Chips, and all the other different types of microchips are the brains of all the devices and technology that we use on a daily basis. But have you ever wondered how these microchips are made? Well, in this video, we’re going to take a tour of a microchip fabrication plant or fab and walk you through the dozens of steps used to make a microchip. Specifically, we focus on how CPUs are made. CPU, GPU, and Smartphone Microchip manufacturing is a multi-trillion dollar industry, and each factory costs in the tens of billions of dollars. This is an overview of all the processes used to make a microchip, as well as an overview of a microchip factory. We’re planning more videos on microchip manufacturing, such as a 3D animated factory tour.

This is the MOST complicated video we’ve made by FAR!! 4 different animators have been working on this video non-stop for the past 5 months, for a total of 1300 hours of research, modeling, script writing, animating, editing, animating again, rendering, and then more editing. Support us on Patreon is you want more videos like this one.
https://www.patreon.com/brancheducation

Website: https://www.branch.education
On Facebook: https://www.facebook.com/BranchEducation/

Shoutout to Asianometry YouTube channel https://www.youtube.com/@Asianometry. This YouTube channel is filled with tons of information on the semiconductor industry, and Microchip Fabs.

Table of Contents:
00:00 – How are Transistors Manufactured?
02:06 – The nanoscopic processes vs the microchip fab
02:34 – What’s inside a CPU?
04:31 – What are FinFet Transistors
05:06 – Imagine Baking a Cake
05:44 – Simplified Steps for Microchip Manufacturing
07:51 – 3D Animated Semiconductor Fabrication Plant Tour
09:54 – Categories of Fabrication Tools
10:26 – Photolithography and Mask Layers
11:52 – EUV Photolithography
13:39 – Deposition Tools
15:02 – Etching Tools
16:02 – Ion Implantation
17:03 – Wafer Cleaning Tools
17:29 – Metrology Tools
18:16 – Detailed Steps for Microchip Fabrication
20:29 – Research and Hours Spent on this Video
22:18 – Silicon Wafer Manufacturing
23:19 – Wafer Testing
23:42 – Binning
24:59 – Explore Brilliant
27:20 – Thank you to Patreon Supporters

Key Branches from this video are: How do Computers Work? How do SoCs Work?

Animation: Mike Radjabov, Prakash Kakadiya, Adrei Dulay, Parvesh Khatri
Research, Script and Editing: Teddy Tablante
Twitter: @teddytablante
Modeling: Mike Radjabov, Prakash Kakadiya
Voice Over: Phil Lee
Sound Design: https://www.drilu.world/
Sound Effects and Music Editor: Raúl Núñez, David Pinete
Supervising Sound Editor and Mixer: Luis Huesca

Erratum:

Animation built using Blender 4.1 https://www.blender.org/

Internet References:
WikiChip Fuse https://fuse.wikichip.org/ is an amazing resource for the specs of different technology nodes.

Semiconductor Engineering https://semiengineering.com/ is an amazing resource for news in the semiconductor industry.

TechPowerUp https://www.techpowerup.com/ is an amazing resource for tech specs of various technology devices.

Wikipedia contributors. “FOUPs”, “Integrated Circuits”, “Photolithography”, “Semiconductor Devices”, “Semiconductor Device Fabrication”, ” Silicon”. Wikipedia, The Free Encyclopedia. Wikipedia, The Free Encyclopedia, Visited May 13nd 2024

Internet References:
Tool Model reference images acquired from: https://www.appliedmaterials.com/il/en/semiconductor/semiconductor-products.html
https://www.tel.com/product/all/index.html#localnav

Textbooks:
Handbook of Semiconductor Manufacturing Technology By Robert Doering and Yoshio Nishi

Microchip Fabrication: A Practical Guide to Semiconductor Processing. Peter Van Zant

Semiconductor Microchips and Fabrication: A Practical Guide to Theory and Manufacturing by Yaguang Lian

Semiconductor Manufacturing Handbook. Second Edition By Hwaiyu Geng

#Microchip #Manufacturing #CPU

Date: June 18, 2024

27 thoughts on “How are Microchips Made? 🖥️🛠️ CPU Manufacturing Process Steps

  1. Also, if you have any questions on the video or semiconductor fabrication, I'd be happy to answer them here.
    This video took an incredible amount of work to make. Me (Teddy T.) and a few other animators (Mike R., Prakash K., Adrei D., and Parvesh K.) have been working non-stop on this video for the past 4.5 months. If you want more videos like this one support our Patreon: https://www.patreon.com/brancheducation

    Q: Why do we use older components e.g. i9-13900K, or the 3090GPU, or Iphone 13 Pro. A: We purchase broken (typically 1 generation old) components from EBay and tear them open to model them.

    Q: Is binning done with all the chips?
    A: Well GPUs are also binned, for example the 3090ti, 3080ti, 3090 and 3080 are all the same chip design called GA102. Whereas DRAM chips are not typically binned, but rather due to the redundancy of DRAM, there are typically extra array structures beyond the capacity of the chip. If cells in an array fail, then they are replaced with the redundant cells. When a chip runs out of redundancy it's considered defective and thrown out. Beyond that chips are binned based on quality and interface speed capability. Thank you @JoeLion55 for the correction.

    Q: Marcel151 asked: The transistor layer, sits it more at the bottom or at the top of the CPU?

    A: JoeLion55 answered: During construction on the wafer, the transistors are built first, directly on the surface of the silicon wafer. Then all of the metal interconnect layers are built on top. This all happens on the original wafer, with hundreds of dies on the wafer. So when in wafer form, the transistors are on the bottom, and the metal is on the top. However, during the packaging process, after the dies are cut apart from the wafer, the die is flipped over and mounted upside-down onto the package substrate. This is because the pins are on the bottom of the package (the pins that go into the socket on the motherboard). The pins on the package need to connect to the top metal layer on the die, which is what allows external signals to enter and exit the die. So, the die is flipped over so the top metal layer is now facing down, and is soldered to the package substrate. So technically, when you have a final "chip" that you install in a motherboard, when you're looking at the top of the chip where the heatspreader is, if you had X-ray vision and could see through the top of the chip, you would be looking at the backside of the die. The backside of the die is pure silicon. Then, if you keep looking through, you would find the transistor layers next. Then keep digging and you'd go through all of the metal layers, then finally you'd reach the interposed and package board.

    Q: elektronikk-service asked: How do you align the different layers in a chip? They cannot be off by more than a few nm.
    A: Joe Lion55 responds: they layers have alignment makes built in. Those are little cross or X-shaped structures that are non functional (they’re not part of any live circuit). But when the lithography machine is putting down a new layer, it will find the alignment marks from the previous layer and adjust the wafer position and/or the scanner optics until the alignment marks are in the right place.

    Q: Someone asked about low die yield for small nanometer transistors, and was it just particles that resulted in low die yield?
    A: For new technology nodes, which are the smallest nanometer names for the transistors- Typically low die yield is due to getting exact parameters for the process steps correct. For example, when FinFets were first being developed, a etching pillars of silicon was incredibly difficult and designing / engineering / and then fine tuning the etchers to perfectly etch billions of fins in perfect fin structures is wildly difficult and is what contributed to low die yield. This is just one of the processes but the example applies to practically all other processes for the a new node. For example, when you do ion implantation, you need to evenly implant about 5-10 atoms of boron / phos to a specific region of the fin. Well, what happens if there are just 2 dopant atoms? Or what about 50?

  2. I've been in the construction of semiconductor fans for about 10 years…the modeling is extremely accurate and I learned more about the processes involved in this short video then in my 10 years….Thank you BRANCH Education I will proudly share your video…

  3. Is this a unit that handles one-way desktop fraud from the employer? It is hoped that the number of victims can be reduced to 0 from now on without spreading,about when home add out phone to out Roc leadr up pices.

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